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  • SILVACO - News - Silvaco Delivers Full-Chip Parasitic Extraction Products
    Digital Equipment Corporation DEC Simplex IPO in 2001 and acquired by Cadence in 2002 licensed the same code as a base to develop their extraction products Silvaco has re engineered this technology to develop a complete set of parasitic extraction products that address the rigorous demands of nanometer technology including an effective RC network reducer HIPEX is fast accurate and can handle large SoCs using industry standard design flows said Ken Brock vice president of marketing at Silvaco It complements our line of physics based full 3D field solver parasitic extraction products for RF components standard cells memory bit cells and capacitance rule file generation HIPEX s key differentiator is selected net extraction for fast RC extraction of critical path nets in SoCs and large memories directly from the Expert Layout Editor Capacitance extraction includes accurate parasitic overlap lateral and fringe Resistance extraction includes parasitics for lines contacts and vias splitting long conducting tracks for accurate RC distribution Multiple parasitic extraction models enable engineers to trade off between accuracy and run time Powerful scripting capabilities within technology files enable user definable algorithms for nanometer devices and interconnect HIPEX supports standard output parasitic netlist files in SPICE back annotated schematic netlists

    Original URL path: http://www.silvaco.fr/news/pressreleases/2004_05_25_01.html (2016-05-03)
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  • SILVACO - News - Silvaco at DAC
    participate on the Accellera sponsored OpenKit Initiative Breakfast Panel on Monday June 7th at 7 30AM with Ken Brock Silvaco s Vice President of marketing and Chairman of the GSA MS RF Foundry Committee PDK working group Live demonstrations of Silvaco s software products will include Harmony AMS Analog Mixed Signal Simulation Platform delivers unsurpassed accuracy and productivity Harmony AMS is based on the Silos Verilog and SmartSpice Circuit simulators integrated into a single kernel simulator that fully supports Verilog AMS Verilog Verilog A and SPICE SmartSpice RF Harmonic Balance Based Simulator provides a complete set of steady state analyses to design GHz range RF wireless application ICs QUEST High Frequency Parasitic Extractor accurately characterizes RF inductors capacitors resistors and transmission lines HIPEX Full Chip Parasitic Extraction products perform 3D accurate and 2D fast extraction of parasitic capacitors and resistors from hierarchical layouts into transistor level netlists Schematic Driven Layout Design Flows with Gateway Schematic Editor driving the SmartSpice Circuit Simulator Expert Layout Editor Guardian DRC LVS LPE and HIPEX parasitic extraction tools supported by Silvaco s process design kits Library Characterization with SmartCell and SmartCore Characterization Tools generate the accurate timing and power models required by leading synthesis HDL

    Original URL path: http://www.silvaco.fr/news/pressreleases/2004_05_20_01.html (2016-05-03)
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  • SILVACO - News - High Voltage IC Design Tool Suite
    40C to175C for bipolar and MOS devices Accurate and fast circuit simulation analysis for multiple corner conditions Precise manual layout including circular transistors Complex device extraction of passive and active power transistors Quickly and cost effectively develop an integrated design and verification flow with multiple EDA tools for processes with many unique devices Silvaco Unique Integrated Solution The SmartSpice Circuit simulator provides the accuracy convergence speed and analysis features required for high voltage and power management design supporting legacy models and netlists from other circuit simulators as well as the IEEE 1364 Verilog A language for compact device models and analog behavioral models Silvaco s BSIM3 Level 88 is the only model that accurately simulates high voltage MOS transistors over their full range of voltage current and temperature avoiding the inaccuracies of standard BSIM3 models These Level 88 models use 9 additional parameters to account for the many physical effects including self heating and asymmetric behavior They have been adopted by several leading foundries that specialize in high voltage and power management processes The Scholar Schematic Editor is the integrated front end of Silvaco s high voltage IC design tool suite providing schematic driven layout netlist processing and a simulation control environment for performing nested sweeps circuit optimization and other complex circuit analysis functions The just released Scholar 1 12 was significantly enhanced with an equation parser for rapid callbacks EDIF 2 0 0 schematic import and a new netlist processor with Pcell layout directives Productive all angle layout editing is provided by Expert Layout Editor It executes parameterized cells Pcells written in the LISA scripting language for design rule correct layout of complex devices such as circular interdigitated and Christmas tree power transistors and spiral inductors Guardian DRC ERC LVS Physical Verification software accurately checks rules extracts layouts of

    Original URL path: http://www.silvaco.fr/news/pressreleases/2004_04_02_01.html (2016-05-03)
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  • SILVACO - News - Verilog-A Downloads
    IEEE 1364 2001 Verilog HDL specification The Compact Modeling Council CMC is a group of semiconductor vendors and EDA vendors that promote standardization of compact model formulations said Joe Watts chairman of the CMC The CMC fully supports efforts like these that facilitate communication between EDA vendors and their customers By using open source information can be transferred quickly between companies and allow for much faster evaluation of improvements made to SPICE models Silvaco s offering of these models in open source affirms the use of Verilog A for compact model development said Vassilios Gerousis chairman of the Technical Coordinating Committee for Accellera Verilog A models can be used by semiconductor manufacturers foundries fabless designers universities and research organizations to significantly improve the quality of today s compact models for tomorrow s semiconductor processes True interoperability happens when market leaders adopt worldwide standards and open interfaces said Ken Brock vice president of marketing at Silvaco These models enable semiconductor vendors and their customers to exchange both public and proprietary models that are simulator independent Using Verilog A for Compact Model Development and Distribution All SPICE circuit simulators use compact models to accurately model the behavior of each primitive device such as transistors diodes capacitors inductors and resistors in a given semiconductor process SPICE models are typically written in the C language and compiled directly into the SPICE program The problem is that any changes to the model source code require that the SPICE simulator models must be recompiled re linked verified and distributed resulting in customers not receiving these improvements for many months Using Verilog A as a compact model development platform model developers without access to SPICE simulator source code can study develop improve and verify compact models in an interactive debugging environment When completed the Verilog A model

    Original URL path: http://www.silvaco.fr/news/pressreleases/2004_03_02_01.html (2016-05-03)
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  • SILVACO - News - PolarFab Delivers Silvaco Process Design Kits for PBC4 BiCMOS/DMOS Process
    Engineering PolarFab This process design kit includes parameterized cells for all of the fifty active and passive components Foundry supported PDKs offer us immediate productivity in design entry simulation and design verification said Mike Wilson Vice President Networking and Industrial Power Management at Semtech We appreciate the tight integration between the PolarFab process and Silvaco tools Silvaco s PDK development methodology really shines with the challenge of a fifty element BiCMOS DMOS process said Kenneth Brock vice president of marketing for Silvaco We were able to complete a comprehensive PDK in a fraction of the time it takes to develop PDKs for other design tool flows About Silvaco Process Design Kits Silvaco PDKs include SmartSpice TM Circuit Simulator models Scholar TM schematic symbols Expert TM Layout Editor technology files parameterized layout cells supporting schematic driven layout for each of the active and passive elements and Guardian TM DRC LVS LPE rule decks Silvaco PDKs enable first time correct silicon shorter design times optimum semiconductor performance lower development costs reduced risks and ultimately faster time to market About PolarFab s PBC4 BCD Process PBC4 monolithically integrates dense low voltage CMOS and bipolar control circuitry with power DMOS transistors This 0 5um BCD process features dual gate oxides 5 5V and 16V complementary N and P channel MOSFETs with 5V 7V 16V 30V and 40V NMOS only capabilities vertical NPN VNPN lateral PNP LPNP bipolar transistors and a variety of passive elements PBC4 is suitable for a wide array of smart power and power management IC applications Silvaco PDKs are available for immediate download from PolarFab s customer support website About PolarFab Headquartered in Minnesota PolarFab is the only US owned pure play semiconductor foundry in the country The company provides silicon solutions for customer designed integrated circuits ICs through proven design

    Original URL path: http://www.silvaco.fr/news/pressreleases/2004_01_27_01.html (2016-05-03)
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  • SILVACO - News - X-FAB to Support Silvaco Analog/Mixed-Signal Flow in Master Kits
    Silvaco EDA support for our comprehensive X FAB master kits said Dr Jens Kosch CTO of the X FAB Group These analog mixed signal design kits support the complete Silvaco analog mixed signal development environment from Scholar Schematic Capture Expert Layout Guardian DRC LVS ERC to verified SmartSpice Circuit Simulator models X FAB is well respected as a foundry with advanced technologies in analog and mixed signal with a wide variety of modular options such as high voltage MEMS and non volatile memory said Kenneth Brock vice president of marketing for Silvaco In supporting Silvaco analog mixed signal design kits X FAB demonstrates its broad support of customers choice in industry leading analog design tools X FAB as a pure play foundry supplier specializes in the manufacturing of analog and mixed signal integrated circuits The company attaches great importance to provide their customers with comprehensive service and first class support from the early product development phase through to production Silvaco analog design kits enable designers to exploit the capabilities of X FAB s advanced semiconductor processes in the early design stages Accurate and reliable SPICE parameters and models are the first and most critical step to achieve an optimum with

    Original URL path: http://www.silvaco.fr/news/pressreleases/2003_10_09_01.html (2016-05-03)
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  • SILVACO - News - Silvaco Acquires Simucad
    hour web distribution system provide Silos customers with their choice for local sales and support The comprehensive Silos Simulation Environment includes an IEEE 1364 compliant Verilog simulator graphical waveform display interactive debugging and analysis tools project management software and analog extensions Commercial Simucad customers design FPGAs ASICs and IP blocks using the Silos Logic Simulation Environment Simucad is a member of the Xilinx AllianceEDA Program Hundreds of universities license Silos

    Original URL path: http://www.silvaco.fr/news/pressreleases/2003_10_07_01.html (2016-05-03)
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  • SILVACO - News - Judgment Entered in Favor of Silvaco
    the Day of the Judgment entered on August 18 2003 CSI is enjoined from using possessing developing selling licensing distributing assisting or providing maintenance for DynaSpice or any product s that incorporate DynaSpice Silvaco has suffered significant financial losses resulting from the theft of SmartSpice CSI has agreed to pay an undisclosed amount of money to Silvaco The Judgment is final as CSI has waived all rights to appeal Silvaco has obtained the perpetual source code rights for ALL Circuit Semantics products as described in a separate Patent and Software License Agreement between Circuit Semantics Inc and Silvaco Data Systems Inc Notice to ALL Former and Current Domestic and International CSI Customers If you have purchased have used or are using CSI products that contain DynaSpice you are in possession of STOLEN PROPERTY You are strongly advised to contact Silvaco IMMEDIATELY to resolve the legal issues Contact Dr Ivan Pesic President and CEO of Silvaco at 408 654 4309 Silvaco is committed to continue the development distribution and worldwide support of all Circuit Semantics products said Dr Ivan Pesic We are committed to working with existing CSI customers to resolve the legal issues as quickly as possible and provide a

    Original URL path: http://www.silvaco.fr/news/pressreleases/2003_08_26_01.html (2016-05-03)
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