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  • Clever - RC Extractor for Realistic 3D Structures
    circuit designs and shrinking process technologies the wire resistance capacitance and inductance or parasitics significantly impact circuit performance Major effects of interconnect parasitics include signal delay signal noise IR drop resistive component of voltage These lead to whole set of signal integrity issues and challenges including Long run times trade off for different levels of accuracy Fast computational methods with desirable accuracy Clever is a field solver based 1D 2D and 3D RC extraction tool that provides foundries and fabless design houses the ability to obtain accurate interconnect models for different engineering needs to address these parasitic extraction issues Features True 3D field solver with advanced lithography Highly accurate R and C extraction No geometry size restrictions Fast feedback for optimization of circuit performance as a function of back end process and layout parameters Local adaptive mesh refinement AMR maximizes accuracy on an optimal mesh Parallel processing supported on multi core and multiple processor User selectable boundary condition material property and solution tolerance control Automatic back annotation of field solved resistances and capacitances onto extracted active device netlist for immediate SPICE analysis Only RC extractor in industry capable of reproducing the lithographic effects defocus and deltaCD Fully coupled electric field and director field simulation for LCD simulation Voltage dependent parasitic extraction on the liquid crystal cells Silvaco s secure encryption maximizes customer and third party intellectual property protection Benefits Clever delivers the best accuracy productivity and versatility for the most complicated interconnect cells including realistic etching and deposition processes Its local AMR feature allows the user to specify a desired accuracy Clever will automatically refine the unstructured mesh where required enabling maximum accuracy Applications Flat panel display such as TFT Touch panel and LCD Electric field distribution 3D structure of touch panel device Round and cone shaped vias Six memory

    Original URL path: http://www.silvaco.fr/products/interconnect_modeling/rc_extraction/clever.html (2016-05-03)
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  • Victory Process - 3D Process Simulator
    an accurate prediction of the active dopant distribution the stress distribution and the device geometry Shrinking device dimensions place increasing demands on the accuracy of dopant and stress profiles so new process models are added for each generation of devices to match new accuracy demands To address these increasingly stringent demands Silvaco developed Victory Process a brand new 1D 2D and mask based 3D process and stress simulator that extends the leading technology legacy of 2D Standford tools to the next generation of process simulation for both foundries and fabless design houses Victory Process has two modes of operation The Advanced structure editor mode or cell mode for fast proto typing of 3D structures The Process simulator mode full feature level set based process simulator more suited to detailed process based simulation such as complex physically based etching deposition redeposition ion beam milling experiments and stress dependent oxidation analysis Features Fast 3D structure prototyping capability enables the in depth physical analysis of specific processing issues Comprehensive set of diffusion models Fermi fullcpl single pair and five stream Physical oxidation simulation with stress analysis Extremely accurate and fast Monte Carlo implant simulation Efficient multi threading of time critical operations of Monte Carlo implantation diffusion oxidation and physical etching and deposition Sophisticated multi particle flux models for physical deposition and etching with substrate material redeposition with particle reflection Open architecture allows easy introduction and modification of customer specific physical models Seamless link to 3D device simulators including structure mirroring adaptive doping refinement and electrode specification Easy to learn powerful debug mode and user friendly SUPREM like syntax Athena compatibility Can also be used in 1D and 2D as a fast calibration platform Automatic switching from 1D 2D and 3D mode Generation of parametrized layouts within the simulator input deck Stress simulation including

    Original URL path: http://www.silvaco.fr/products/tcad/process_simulation/victory_process/victory_process.html (2016-05-03)
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  • Victory Device 3D Device Simulator
    material database for silicon and compound materials Stress dependent mobility and bandgap models Highly customizable physical models using the C Interpreter or dynamically linked libraries DC AC and transient analysis Drift diffusion and energy balance transport equations Self consistent simulation of self heating effects including heat generation heat flow lattice heating heat sinks and temperature dependent material parameters Advanced multi threaded numerical solver library with support for distributed computing Quantum correction and tunneling models Ray trace and FDTD optical methods Radiation effects including single event upset SEU total dose and dose rate 64 bit 80 bit 128 bit 160 bit 256 bit and 320 bit precision Atlas compatible Silvaco s secure encryption for maximum customer and third party intellectual property protection Benefits Electrical thermal and optical characterization of advanced semiconductor devices allows for device performance optimization Understanding the challenges of current technologies leads to reduced product development time Exploration of novel device technologies for next generation devices Applications Power Victory Device s capabilities allow the electrical and thermal behavior of power devices such as power MOS LDMOS SOI thyristors and IGBTs The advanced 3D Delaunay mesh corresponding discretization and extended precision numerics used by Victory Device allow the stable and accurate simulation of wide bandgap materials such as SiC and GaN These devices can also be embedded with a circuit and simulated by the built in SPICE circuit simulator 3D electric field distribution Field is maximum at the corner of the trench Advanced CMOS Hot carrier stress and quantum correction and tunneling models allow for the simulation of advanced CMOS devices such as FinFET and FDSOI This 3D FinFET is simulated with a 3D fully unstructured tetrahedral mesh The mesh is fully automated including refinement on doping and interfaces 3D FinFET structure Compound Semiconductor Support for a wide range of

    Original URL path: http://www.silvaco.fr/products/tcad/device_simulation/victory_device/victory_device.html (2016-05-03)
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  • SmartSpice - Analog Circuit Simulator
    As technology advances to the nano scale regime how to simulate efficiently all the important new physical effects that emerge with continually shrinking devices becomes crucial to circuit design and verification As circuit design size increases and geometrical features shrink masks to fabricate the circuit become more expensive and costly especially when circuit functionality issues arise and an iteration is required The less expensive option is to simulate the circuit using extracted electrical models of the fabricated component parts then build the circuit mathematically and to solve the problem more quickly than in the time required to make the part SmartSpice allows users to verify circuit functionality accurately without spending the additional time and money required to make the physical circuit Features 100 HSPICE and SPECTRE compatible for netlists models analysis features and results Multiple solvers and stepping algorithms for robust convergence Largest collection of calibrated SPICE models for traditional technologies Bipolar CMOS and emerging technologies TFT UOTFT SOI HBT FRAM FinFET etc Provides open model development environment and extensive analog behavioral capability with Verilog A SEE Single Event Effects reliability analysis for nanometer scale designs Silvaco s secure encryption maximizes customer and third party intellectual property protection 64 bit platform support for Windows and Linux to allow large designs Benefits Accuracy Most accurate circuit simulation results for critical analog designs Speed Because everything is specified electronically configuration or operating conditions can be changed quickly and corresponding electrical output simulated quickly Cost Simulation run at much lower cost than making physical part Ease of Adoption SmartSpice fits existing design flow and foundry models Applications Developing circuit functionality to meet user specification without cost and time of actually making real part Integrated Optimizer iterates device or model parameters to achieve target specifications in such forms as DC AC transient curves propagation

    Original URL path: http://www.silvaco.fr/products/analog_mixed_signal/smartspice.html (2016-05-03)
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  • Webinars
    3D space partitioning of heterogeneous 3D IC designs and 3D Design Rule Checking 3D DRC Power Integrity and Reliability Analysis Archive This webinar will provide an overview of Silvaco s power integrity analysis tool InVar InVar s concurrent approach to simultaneous modeling power voltage and temperature makes reliability analysis real world accurate This webinar will covergate and transistor level power EM IR and thermal analysis from quick design analysis to signoff Brief introduction to required input data and a short demo will also be presented High Voltage Power Device Modeling with HiSIM HV 2 Archive This webinar will provide a comprehensive overview of model parameter extraction for high voltage devices using the industry standard HiSIM HV 2 model HiSIM HV 2 model parameter effects will be explained first followed by a step by step description of model parameter extraction using Utmost IV Finally depletion mode which is implemented in the latest version of HiSIM HV 2 2 0 will be introduced Language English High Voltage Power Device Modeling with HiSIM HV 2 Archive This webinar will provide a comprehensive overview of model parameter extraction for high voltage devices using the industry standard HiSIM HV 2 model HiSIM HV 2 model parameter effects will be explained first followed by a step by step description of model parameter extraction using Utmost IV Finally depletion mode which is implemented in the latest version of HiSIM HV 2 2 0 will be introduced Language Japanese Simulating Total Dose Prompt Dose Damaging Fluence and SEU using TCAD Archive This webinar will provide specific approaches for simulating electronic device behavioral changes including oxide charging and physical damage during their exposure to four of the most common radiation environments that occur during operation in space or near any other high energy particle or photonic source Referenced paper

    Original URL path: http://www.silvaco.fr/webinar/index.html (2016-05-03)
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  • Efficient 3D TCAD Simulation of Silicon Power Devices
    process and device simulators Furthermore there is interest in simulating larger device structures including cells and termination In this webinar we will describes new unified 3D TCAD platform and its use to simulate in 3D a vertical LOCOS transistor as well as current filaments in multi cells IGBT structure What attendees will learn Overview of Victory TCAD Platform Architecture of this new platform 3D rapid prototyping to detailed physical simulation Meshing concept Solvers review Applications Vertical LOCOS Power Devices 2D and 3D cell design 3D current filaments simulation in Multicell IGBTs Presenter Dr Eric Guichard is Vice President of the TCAD Division He is responsible for all aspects of the TCAD division from R D to field operations Since joining Silvaco in 1995 he has held numerous positions including director of Silvaco France and most recently Director of Worldwide TCAD Field Operations Prior to joining Silvaco Dr Guichard was a senior SOI engineer specialized in aging of transistors and circuits at LETI and Thomson Military and Space Dr Guichard holds an MS in material science and a Ph D in semiconductor physics from Ecole Nationale Polytechnique de Grenoble France Register to View Archived Webinar Register Who should attend Power device

    Original URL path: http://www.silvaco.fr/webinar/efficient_3d_tcad_simulation_of_silicon_power_devices.html (2016-05-03)
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  • Variation aware design for advanced nodes and low power technologies
    meet yield requirements Though brute force Monte Carlo is accurate it is impractical in terms of time and simulation licenses consumed More efficient techniques are needed for practical variation aware design Silvaco s Variation Manager delivers innovative Monte Carlo techniques that allow for fast examination of analog cells or AMS RF IC s and enables robust high sigma investigation of highly replicated design elements such as memory bitcells or logic standard cells Variation Manager s innovative sampling techniques will help designers address variation issues much faster and at a lower cost What attendees will learn Design challenges to account for variation Monte Carlo in practice how to be efficient and minimize risks Variation aware design for analog Variation aware design for memory and standard cells Presenter Pierre Faubet Ph D is a Senior R D Engineer in the Process Variability Group Pierre joined Silvaco Infiniscale in 2011 to develop efficient and practical solutions for variation aware design Prior to this he developed simulation and embedded software for optical CAD engineers Pierre holds a MSc in bio statistics informatics and a Ph D in population genetics from Université Joseph Fourier de Grenoble France Register to view Archive Webinar Language English Register

    Original URL path: http://www.silvaco.fr/webinar/variation_aware_design.html (2016-05-03)
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  • SILVACO Technical Library
    Application Notes Training Materials Published Papers DIGITAL DESIGN Presentation Materials Application Notes Training Materials Published Papers Books published referencing Silvaco Software Books Latest Updates Simulation Standard January February March 2016 Application Note A Script to Create a Verilog Interface Reading VCD Event Data for a Testbench August 2015 White Paper State of the Art 3D SiC Process and Device Simulation May 2014 Hybrid Inverter and Ring Oscillator January 2014 CORPORATE

    Original URL path: http://www.silvaco.fr/tech_lib/index.html (2016-05-03)
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