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  • TFT - 2D Amorphous and Polycrystalline Device Simulator
    two different drain biases IV characteristics for a p and n channel poly Si TFT Simulation of a TFT Driven Pixel TFT can be used with MixedMode to accurately simulate a pixel of a TFT LCD panel As a more physically based alternative to compact TFT models this allows designers to analyze and optimize LCD panel circuit designs and to evaluate the effects of parasitic components within each pixel TFT handles multiple pixels to allow large scale simulation of the LCD panel Shown is an equivalent circuit of a TFT pixel MixedMode is used to simulate the electrical characteristics of the TFT driven pixel Effect of bit line programming of a TFT pixel Drain voltage follows source voltage with a delay resulting from the external resistive and capacitative elements Capacitance as AC Analysis TFT can be used with small signal AC analysis to extract figures of merit as well as capacitance information At higher drain voltages Cgd increases slightly which is different from bulk MOS devices This phenomenon is more evident in smaller devices where the Cgs decreases and Cgd increases with increasing drain voltage which can be explained by the kink effect of poly Si TFTs Grain Boundaries Grain boundaries severely effect the mobility in TFTs TFT allows grain boundaries to be assigned within the channel as different regions These regions can then be assigned properties which differ from the properties of the grain regions These material properties can be supplied from a C Inpterpreter file or by using functions with TFT TFT structure showing the grain boundary DIGBL Effect This figure shows that the DIGBL effect from the on state resistance at drain is 5V The line of each gate voltage does not cross at one point This is a unique phenomena of poly Si TFTs IdVd characteristics

    Original URL path: http://www.silvaco.fr/products/vwf/atlas/2D/tft/tft_br.html (2016-05-03)
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